Earlier today, IBM put out a release claiming a major "performance leap" for chips that use its forthcoming 32nm semiconductor process. Working out what's changed since the last release is a bit trickier. Basically, IBM and some of the companies in its group of chipmaking collaborators have made a bunch of test chips and are now confident enough to declare the 32nm process open for business.
Other than that, the content of today's missive is not broadly different from the one that IBM and its partners put out just ahead of the chipmaking industry's big conference on process technologies, the International Electron Device Meeting in Washington DC, held late last year. There really isn't a lot more detail, other than there is now a timetable: IBM will start running prototypes for customers of the companies in its Common Platform alliance in the third quarter of this year. The implication is that the company's in the Common Platform team will have a working 32nm process in the second half of 2009, about the same time as Intel and TSMC as long as they stay on schedule.
Where IBM, Intel and TSMC deviate is over how the transistors are made. IBM and Intel decided to with metal gates for their 45nm processes - although companies in the Common Platform alliance do not have access to the IBM metal-gate technology at 45nm. IBM has kept the 45nm version to itself for use by its computer operation. Intel, as it was keen to tell everybody, opted for metal gates and a hafnium dielectric for its latest generation of processors.
TSMC has, for 32nm, no publicly announced plans to shift to metal gates, despite the apparent benefits of the metal approach. The company continues to experiment with approaches but looks to be pressing ahead with a conventional gate structure. IBM has claimed the tests performed by its team show a speed boost of 40 per cent over conventional transistors with gates made using today's polysilicon. If the improvement is that good, why not do it? Cost, that's why.
One thing that's missing from anything that IBM has said so far about its, apparently, better process is what the developers have done to not push up the cost of making chips with metal gates. It's not unusual. Although Intel was only too keen to say that it was swapping out silicon dioxide in favour of a hafnium oxide for its metal gate stack, what was missing was how the world's largest chipmaker was going to manufacture devices without forcing up cost.
The problem with metal gates is that, in most processes described to date, you need two different metals for the two types of transistor used in a CMOS process. And that means double the number of steps during the most expensive part of the chipmaking process. Intel worked around it by adopting a so-called gate-last process - make dummy versions of the gates and then, at the last minute, etch them out and drop the right materials down the hole. It sounds messy but Intel claimed at IEDM that it was little more complex than previous processes, and the company was careful not to give too much away. Officially, we don't know what they used. Unofficially, companies such as Chipworks have provided clues as to what Intel used.
With IBM's process we don't even have that much: even the gate dielectric is a closely guarded secret although it looks as though the VLSI Technology Symposium in Honolulu may provide some of the answers. What we do know is that IBM is working with just one type of metal and using tweaks in the process to tune the metal's properties for the two types of transistor needed.
A number of groups are working on this kind of single-metal process, something that most mainstream chipmakers believe is essential if metal gates are to be cheap enough for them to use. Intel and IBM had little choice but to go with metal gates for 45nm as their high-end processors would suffer with the polysilicon approach. But most companies's designs don't need the speed or ability to cope with tens of watts of power that a Penyryn does. For many of them, the only thing that counts is transistor density: a lot of these processors should not chew up more than 3W of power, let alone the 130W of a high-end processor. This is why TSMC does not seem overly concerned about delivering metal gates: many of its biggest customers just don't need them.
Update: As I'm increasing the amount of blogging that I'm doing on chip-related matters, I'm gradually bringing up a second blog – shrinkingviolence.com. Right now, a lot of the material has been crossposted from here. But I'm now adding posts that you can only find there: such as this one going into more detail on Common Platform versus TSMC.